A class D amplifier, or switching amplifier, is a circuit based on a Pulse Width Modulation (PWM) technique, in which the amplitude of an input signal to be amplified is converted into the duty cycle of a reference high frequency signal. Class D amplifiers are well known for having a much higher power efficiency than conventional class A and B amplifiers.
The performances of the class D amplifiers in terms of noise floor and total harmonic distortion versus the level of the input signal are strictly dependent on the accurateness in the determination of the duty cycle through the pulse width modulator.
Almost all known class D amplifiers make use of a Delta-Sigma loop in order to minimize the errors made in the determinations of the output duty cycle. In general, a known way to improve the performances of the pulse width modulator is to equip such modulator with a feedback loop and a loop filter. Due to the presence of the feedback loop and loop filter, one of the main issue in a class D amplifier with feedback loop and loop filter is to preserve the stability of the loop. For this purpose, an important design variable is the input dynamic range of the amplifier.
A prior art digital class D amplifier is disclosed in a first paper, namely “A 120 dB Dynamic Range 400 mW Class-D Speaker Driver With Fourth-Order PWM Modulator”, W. Wang, X. Jiang, J. Song and T. L. Brooks, IEEE Journal of Solid-State Circuits, vol. 45, No. 8, August 2010. In particular the above first paper, with reference to FIG. 5 thereof, discloses a class D amplifier with a pulse width modulator, based on a delta sigma loop architecture, comprising a digital loop filter and a feedback loop adapted to feedback the output pulse-width modulated signal at the input of the digital loop filter. According to the paper, the above class D amplifier attains high performances, due to the feedback of the output of the pulse width modulator and due to correction performed by the delta sigma loop. However, in practical implementations, due to some constraints on the sampling frequency of the input signal and on the frequency of the reference signal, the output signals may show unwanted spikes. The above problem depends also on the level of the input signal and is more accentuated for input samples having relatively high values. The level of the input signal is furthermore constrained by the need to preserve the stability of the loop.
Some examples of class-D amplifier architectures are disclosed in a second paper, namely “Class-D Audio Amplifiers in Mobile Applications”, Marco Berkhout et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEM, VOL. 57, NO. 5, 1 May 2010.